In a number of digital receiver applications, a need exists for comparing incoming analog and digital signals with preselected reference levels and generating an output digital signal dependent thereon.
Although comparator circuits are well known in the art, they are traditionally used in conjunction with single reference levels. It would be quite advantageous for a digital receiver to be capable of high frequency operation with high and low reference levels, where the input signal has a noise content. Further, it would be most desirable to maximize the design of such a circuit so that it could be incorporated in a hybrid single in-line package.